Design-Reuse

AI in VLSI Physical Design: Opportunities and Challenges

As semiconductor technology pushes the boundaries of scale and complexity, traditional VLSI physical design methodologies are struggling to keep pace. The rise of Artificial Intelligence (AI), ...
EDN

Managing variations in IC physical design

At nanometer technologies, variability is rapidly becoming one of the leading causes for chip failures and delayed schedules. However, there is significant confusion about the term “variability” in ...
Design-Reuse

Using in-design physical verification to reduce tapeout schedules

. Tadahiko Yamamoto is Chief Specialist, Design Methodology Development Group, at Toshiba Corp. . Norikazu Ooishi is Specialist, Design Methodology Group, at Toshiba Corp. Physical designers moving to ...
EDN

Hierarchical physical design—issues and methodologies

In IC physical design, there is a tendency to focus on the synthesis and layout tasks, and to not give much consideration to the chip finishing tasks, at least not until the more pressing matters of ...
Nature

Physical approaches to biomaterial design

The development of biomaterials for drug delivery, tissue engineering and medical diagnostics has traditionally been based on new chemistries. However, there is growing recognition that the physical ...
Semiconductor Engineering

Optimizing For Energy In Physical Design

Energy is a precious resource, which should not be wasted. Energy drives economies and sustains societies. Predictions show that the energy of electronics may soon consume 20% to 33% of the global ...